Semiconductor Engineering

HW/SW Co-Design to Retarget the Compiler For RISC-V Custom Instructions (Tampere Univ.)

A new technical paper titled “Automatically Retargeting Hardware and Code Generation for RISC-V Custom Instructions” was ...

Beast instead of for-loop: AI develops programming language in Gen-Z slang

A developer from Australia ran Claude Code in a continuous loop for three months to develop a GenZ compiler. He calls the ...
IEEE

Radar Code Design for the Joint Optimization of Detection Performance and Measurement Accuracy in Track Maintenance

Abstract: This paper deals with the design of slow-time coded waveforms which jointly optimize the detection probability and the measurements accuracy for track maintenance in the presence of colored ...
GitHub

rive-app/rive-code-generator-wip

Simplify Rive integration at runtime: Generate type-safe wrappers for Rive files. {{riv_pascal_case}}: The Rive file name in PascalCase {{riv_camel_case}}: The Rive file name in camelCase ...
GitHub

Smart Error Code Generator

Find the location of the error code in the project. the format shuld be given in {path}{line}. (line optional) note that the relative path and code generation ...
IEEE

Improving LLM-Based Verilog Code Generation with Data Augmentation and RL

Abstract: Large language models (LLMs) have recently attracted significant attention for their potential in Verilog code generation. However, existing LLM-based methods face several challenges, ...