EDN

Verilog simulator supports 64-bit Linux

SANTA CRUZ, Calif. — Claiming a new level of performance and affordability for high-capacity simulation, Fintronic USA has announced that its Super FinSim Verilog simulator now runs on 64-bit Linux ...
Design-Reuse

Synopsys VCS Verilog Simulator Incorporates Breakthrough Verification Capabilities

MOUNTAIN VIEW, Calif.--(BUSINESS WIRE)--Sept. 26, 2001-- Synopsys, Inc. (Nasdaq:SNPS), the technology leader for complex IC design, today announced VCS(TM) 6.0.1, the latest release of the industry's ...
Design-Reuse

Fintronic's SuperFinSim Verilog Simulator accelerated through tight integration with Novas Debussy Debug System

FOSTER CITY, Calif.-- July 18, 2003--Fintronic USA, Inc., a leading provider of high-performance Verilog simulators announced the release of an API-based interface between Super FinSim? and the ...
EDN

FROM EDN EUROPE: Superlog simulator appears, also handles Verilog and c variants

Co-Design has introduced Systemsim, a verification environment that lets you use its own Superlog system-design language (see “Get a handle on design languages” in this issue) alongside code written ...